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TitleMulti-application multi-step mapping method for many-core network-on-chips
Creator
Date Issued2010
Conference Name28th Norchip Conference, NORCHIP 2010
Source Publication28th Norchip Conference, NORCHIP 2010
Conference Date15-16 November, 2010
Conference PlaceTampere
CountryFinland
Abstract

Massive parallel computing performed on many-core Network-on-Chips (NoCs) is the future of the computing. One feasible approach to implement parallel computing is to deploy multiple applications on the NoC simultaneously. In this paper, we propose a multi-application mapping method starting with the application mapping which finds a region on the NoC for each application and then task mapping which maps all tasks of the application into each region. In the application mapping step, several strategies based on the maximal empty rectangle (MER) technique are introduced for finding an optimal region for each application. In the task mapping step, a tree-model based algorithm is used with the purpose of reducing the communication latency and energy consumption. The experiment results show that the proposed method can achieve considerable reduction of network latency and energy consumption (up to 18%) for a given set of applications. ©2010 IEEE.

DOI10.1109/NORCHIP.2010.5669454
URLView source
Language英语English
Scopus ID2-s2.0-78751468985
Citation statistics
Cited Times [WOS]:0   [WOS Record]     [Related Records in WOS]
Document TypeConference paper
Identifierhttp://repository.uic.edu.cn/handle/39GCC9TT/9335
CollectionResearch outside affiliated institution
Corresponding AuthorYang, Bo
Affiliation
1.Department of Information Technology,University of Turku,Finland
2.Academy of Finland,Research Council for Natural Sciences and Engineering,Turku,Finland
3.Turku Center for Computer Science,Turku,Finland
Recommended Citation
GB/T 7714
Yang, Bo,Guang, Liang,Xu, Thomas Canhaoet al. Multi-application multi-step mapping method for many-core network-on-chips[C], 2010.
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