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21
Authors
XU Thomas Canhao
21
Document Type
Conference paper
15
Journal article
6
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21
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CPCI-S
8
SCIE
4
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Network-on-Chip
9
Multicore
7
Network-on-chip
6
Chip multiprocessor
4
Heterogeneous
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network-on-chip
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ACM International Conferenc...
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PEN: a power law–enhanced network design for high efficiency multicore architecture
Conference paper
Concurrency and Computation: Practice and Experience, Tianjin, August 23-26
Authors:
Xu, Thomas Canhao
;
Leppänen, Ville
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Submit date:2022/06/13
efficiency, heterogeneous, interconnection, multicore, network-on-chip, power law
LUTmap: A dynamic heuristic application mapping algorithm based on lookup tables
Conference paper
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Wuhan, September 28-30, 2016
Authors:
Xu, Thomas Canhao
;
Leppänen, Ville
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Submit date:2022/06/13
Application mapping
Lookup table
Multicore
Network-on-chip
Trio: A triple class on-chip network design for efficient multicore processors
Conference paper
Proceedings - 2015 IEEE 17th International Conference on High Performance Computing and Communications, 2015 IEEE 7th International Symposium on Cyberspace Safety and Security and 2015 IEEE 12th International Conference on Embedded Software and Systems, HPCC-CSS-ICESS 2015, New York, AUG 24-26, 2016
Authors:
Xu, Thomas Canhao
;
Leppänen, Ville
;
Liljeberg, Pasi
;
Plosila, Juha
;
Tenhunen, Hannu
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  |  
Submit date:2022/06/13
Cache
Design
Efficient
Multicore
Network-on-chip
PDNOC: Partially diagonal network-on-chip for high efficiency multicore systems
Journal article
Concurrency and Computation: Practice and Experience,2015, volume: 27, issue: 4, pages: 1054-1067
Authors:
Xu, Thomas Canhao
;
Leppänen, Ville
;
Liljeberg, Pasi
;
Plosila, Juha
;
Tenhunen, Hannu
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Submit date:2022/06/13
efficiency
heterogeneous
hybrid
interconnect
multicore
network-on-chip
Exploration of a heterogeneous concentrated-sparse on-chip interconnect for energy efficient multicore architecture
Conference paper
Proceedings - 2014 IEEE International Conference on Computer and Information Technology, CIT 2014, Xi'an, SEP 11-13, 2014
Authors:
Xu, Thomas Canhao
;
Leppänen, Ville
;
Forsell, Martti
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Submit date:2022/06/13
Heterogeneous
Multicore
On-chip Network
Parallel System
Sparse Network
PDNOC: An efficient partially diagonal network-on-chip design
Conference paper
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Warsaw, SEP 08-11, 2013
Authors:
Xu, Thomas Canhao
;
Leppänen, Ville
;
Liljeberg, Pasi
;
Plosila, Juha
;
Tenhunen, Hannu
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  |  
Submit date:2022/06/13
3D Chip
Heterogeneous
Multicore
Network-on-Chip
DSNOC: A hybrid dense-sparse network-on-chip architecture for efficient scalable computing
Conference paper
Proceedings - 2013 IEEE 11th International Conference on Dependable, Autonomic and Secure Computing, DASC 2013, Chengdu, December 21-22, 2013
Authors:
Xu, Thomas Canhao
;
Leppanen, Ville
;
Forsell, Martti
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Submit date:2022/06/13
Multi-core
Network-on-Chip
Parallel Systems
Scalable Computing
Sparse Networks
Evaluate and optimize parallel Barnes-Hut algorithm for emerging many-core architectures
Conference paper
Proceedings of the 2013 International Conference on High Performance Computing and Simulation, HPCS 2013, Helsinki, July 1-5, 2013
Authors:
Xu, Thomas Canhao
;
Liljeberg, Pasi
;
Plosila, Juha
;
Tenhunen, Hannu
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Submit date:2022/06/13
Barnes-Hut
Interconnection
Many-core
Mapping
Network-on-Chip
Parallel System
Optimized multicore architectures for data parallel fast Fourier transform
Conference paper
ACM International Conference Proceeding Series, Xi'an, June 28-29, 2013
Authors:
Xu, Thomas Canhao
;
Pahikkala, Tapio
;
Liljeberg, Pasi
;
Plosila, Juha
;
Tenhunen, Hannu
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Submit date:2022/06/13
data parallel
FFT
multicore
network-on-chip
optimization
MMSoC: A multi-layer multi-core storage-on-chip design for systems with high integration
Conference paper
ACM International Conference Proceeding Series, Bulgaria, June 28-29, 2013
Authors:
Xu, Thomas Canhao
;
Liljeberg, Pasi
;
Plosila, Juha
;
Tenhunen, Hannu
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Submit date:2022/06/13
3D chip
memory
multi-core
network-on-chip
solid state disk